The syntax of the "R" command is:
R[+][ = value]
where "+" causes the STACK to be displayed after the Registers
" = value" selects the output format and is bitmapped as:
B00000001 = 0x01 = 1 always print a carriage return before each line
B00000010 = 0x02 = 2 print a header once each second
B00000100 = 0x04 = 4 always print the header (overrides the bit above)
B00001000 = 0x08 = 8 include the "SP" (Stack Pointer) information
B00010000 = 0x10 = 16 include the "RetAdd" (Return Address) information
B00100000 = 0x20 = 32 include the "SREG" (Status Register) information
B00100000 = 0x40 = 64 also dump the stack after the register dump
B00100000 = 0x80 = 128 (unused)
>r
10 32 54 76 98 1110 1312 1514 1716 1918 2120 2322 2524 2726 2928 3130 SP SREG
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- --------
0000 195F 0908 0864-0004 0000 0000 4000-0001 3165 5202 0020-0020 0230 0280 3165 08F4 ItHsvnZc
>r = 0x3a
10 32 54 76 98 1110 1312 1514 1716 1918 2120 2322 2524 2726 2928 3130 SP SREG
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- --------
0000 235A 090B 0B64-0004 0000 0000 4000-0001 3165 5208 3D20-3D20 0230 0280 3165 08F4 ItHsvnZc
>r
10 32 54 76 98 1110 1312 1514 1716 1918 2120 2322 2524 2726 2928 3130 SP RetAdd SREG
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ------ --------
0000 09AB 090C 0C64-0004 0000 0000 4000-0001 3165 5201 0000-0000 0230 0280 3165 08F4 6944 ItHsvnZc
>r = 0x7a
10 32 54 76 98 1110 1312 1514 1716 1918 2120 2322 2524 2726 2928 3130 SP RetAdd SREG
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ------ --------
0000 15DD 0910 1064-0004 0000 0000 4000-0001 3165 5208 3D20-3D20 0230 0280 3165 08F4 6944 ItHsvnZc
>r
10 32 54 76 98 1110 1312 1514 1716 1918 2120 2322 2524 2726 2928 3130 SP RetAdd SREG
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ------ --------
0000 17DF 0910 1064-0004 0000 0000 4000-0001 3165 5201 0000-0000 0230 0280 3165 08F4 6944 ItHsvnZc
STACK contents:
08F0: 31 34 A2 31-42 30 02 31 0E 01 3A CB 14.1B0.1..:.
>r = 0
10 32 54 76 98 1110 1312 1514 1716 1918 2120 2322 2524 2726 2928 3130 SP RetAdd SREG
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ------ --------
0000 058F 0914 1464-0004 0000 0000 4000-0001 3165 5205 3D20-3D20 0230 0280 3165 08F4 6944 ItHsvnZc
STACK contents:
08F0: 31 34 A2 31-42 30 02 31 0E 05 3A CB 14.1B0.1..:.
>r
0000 251D 0914 1464-0004 0000 0000 4000-0001 3165 5201 0000-0000 0230 0280 3165
>r+
10 32 54 76 98 1110 1312 1514 1716 1918 2120 2322 2524 2726 2928 3130
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
0000 31DF 0947 4764-0004 0000 0000 4000-0001 3165 5202 002B-002B 0230 0280 3165
STACK contents:
08F0: 31 34 A5 31-42 30 02 31 0E 02 3A CB 14.1B0.1..:.
>
The "ItHsvnZc" is the contents of the Status Register (SREG) at I/O
address 0x3F or SRAM address 0x5F. Uppercase letters means the corresponding
flag is TRUE or ON; lowercase means FALSE or OFF. So "ItHsvnZc" means
that Global Interrupts are enabled, and the HALF-CARRY and ZERO flags are SET,
while the "T" flag, SIGN, OVERFLOW, NEGATIVE and CARRY flags are all CLEAR at
the instant that SREG was checked.
The variable after the "R = " is stored in SRAM location 0x1DF in the 328P
and 1284P (at 0x2DF in the 2560), so it could also be changed using an Edit
command like "E 0x1DF = 0x7A", for example. Its default value is 42 or 0x2A.
Also note that the widest terminal output shown in the examples above has
the 'c' in column 100.
See also:
The DumpRegisters and
DumpStack system routines.