+--------+
MISO PB4 | *1 2* | Vcc
SCK PB5 | *3 4* | PB3 MOSI
RST PC6 | *5 6* | Gnd
+--------+
PB0 . *7 8* . PB1
PB2 . *9 10* . PD3
.......... | On each device which SCADA Support Group creates, there is a 10-pin EISP (Extended In-System-Programming) port, depicted at left. Its upper six (6) pins are connected to the 328P SPI port and are laid out in the customary ISP configuration, as shown. The lower four (4) pins are the Extended portion. Unless configured not to do so, these pins are used at the end of the boot process to optionally perform one of three (3) selectable EEPROM resets, or none at all, which is the usual case. These are connected to the 328P pins PB0, PB1, PB2, and PB3, so they are able to be used on devices without the EISP connection layout shown. |
| Connect pins | to reset these EEPROM variables to 0xFF: |
|---|---|
| PB2 to PD3 | Only 4 bytes: EEbSystemMode (1), EEbFlags_OS (8), and EEwCOM1_xBPS (48 and 49) |
| PB1 to PD3 | Only the first 16 EEPROM BYTEs |
| PB0 to PD3 | All 80 EEPROM configuration BYTEs |
The tests are performed in the order shown above, from the fewest BYTEs reset to the most, so PB2 is checked first. If PB2 is directly jumpered to PD3, those four (4) BYTEs are reset and the subroutine exits without checking PB1 or PB0. If PB2 is NOT connected to PD3, then PB1 is checked to see if it is directly connected to PD3 and if so, the first 16 BYTEs are reset to zero and the subroutine exits without checking PB0. If neither PB2 or PB1 are connected to PD3, then if PB0 is directly connected to PD3, then all eighty (80) of the EEPROM Operating System configuration BYTEs are reset to the value 0xFF.
It must be a direct, wired, jumper connection between the two pins. The subroutine "wiggles" one pin, then in about a microsecond verifies that the same signal level is present on the other pin. It then reverses the polarity and checks again, repeating this cycle several times. If any of them fail, no change is made. The EISP checking subroutine is ONLY called on bootup. After that, pins PB0, PB1, and PB2 may be reconfigured and used for any other purpose. PD3 always generates IRQ1, which can awaken the device from a sleep cycle. It is used as the Alarm Discrete Input on the SSG Dual Relay board, for example.
The bits in EEbSystemMode at EEPROM address 1 are those checked to enable each of the Automatic System Functions. These are the Analog to Digital conversions, Multitasking logic, Sequencing logic, Script processor, Dual Pump Control, Alarm input, Level Display and the "Each Main" option. When EEbSystemMode is 0xFF, it is changed to zero and all options are OFF. To change them from a command prompt, simply enter "E 1 = ", then the value. The EEbSystemMode is read once each second, when the unit Serial Number is valid. If EEbSystemMode is 0xFF, it is changed to zero. In either case, it is saved in Register R16. Its customary value is 33, or 0x21, which only enable automatic Analog to Digital conversions and Script processing.
The EEbFlags_OS BYTE at EEPROM address 8 are also read once every Second (again, only if the unit Serial Number is valid), checked and set to zero if it is 0xFF. They are saved in Register R8. See the SystemEEPROM.Def file for the individual bit usages. Since BIT_OS_APP_SKIP and BIT_OS_APP_STOP can cause a system to be unresponsive, this variable is included in the least destructive reset. Its customary value is 4, which enables copying of any unchanged FLASH BYTEs in a 128-BYTE block during an iHex command.
The EEwCOM1_xBPS WORD at EEPROM address 0x31:0x30 (48 and 49) is only read once, during the bootup sequence. If this value is either 0 or 0xFFFF on bootup, the value of EEwCOM1_xBPS is discarded and the default 9,600 BPS (Bits Per Second) communication rate set in the device while EEwCOM1_xBPS itself is not changed. In normal usage, the the EEwCOM1_xBPS value is multiplied by ten (10) to select the actual initial device communication rate. Its factory configured value is 0x1680 (= 5,760), which selects the 57,600 BPS communication rate.
Details:
The MIRTOS configuration is maintained in the first eighty (80) BYTEs of EEPROM. Devices with MIRTOS come with the factory default with these preconfigured, so they should contain something very similar to this:
> DES EEPROM contents: 0000: 10 21 00 9F 01 00 84 FF-04 00 FF FF 28 3C 50 FF .!..........(<.. 0010: C0 00 3F FF 40 08 03 67-FF 25 74 FF FF FF FF FF ..?.@..g.%t..... 0020: 24 28 05 00 FF FF 2A FF-FF 14 30 20 00 30 FF FF $(....*...0 .0.. 0030: 80 16 FF FF FF FF FF FF-60 00 B0 00 80 01 FF FF ........`....... 0040: FF FF FF FF FF FF 00 2F-FF FF FF FF FF FF FF FF ......./........ >
When the device boots up, either from an initial power-up, the RESET pin pulled LOW, a brown-out detected, or a watchdog timeout, it performs its initial configuration then calls a subroutine named Check_EISP. That routine first reads EEbFlags_Security and checks to see if it is 0xFF, which is the "unprogrammed" state of any BYTE of EEPROM or FLASH. Here is a summary of the logic sequence:
| Step | Conditional statement | How to respond if YES |
|---|---|---|
| 1) | Is EEbFlags_Security = 0xFF? | Increment it (set it to 0). |
| 2) | Is EEbFlags_Security = 0? | Proceed to Step #5. |
| 3) | Is BIT_SEC_MUST_BE_0 in EEbFlags_Security TRUE? | Exit with no further processing. |
| 4) | Is BIT_SEC_NO_EISP_CK in EEbFlags_Security TRUE? | Exit with no further processing. |
| 5) | Is BIT_SEC_FIXED_BPS in EEbFlags_Security TRUE? | Proceed to Step #7. |
| 6) | Are pins B2 and D3 directly connected to each other? | Set EEPROM BYTEs 1, 8, 48 and 49 to 0xFF, Register UBRR to 103, bit U2X0 ON, and exit |
| 7) | Are pins B1 and D3 directly connected to each other? | Set EEPROM BYTEs 0 through 15 to 0xFF and exit |
| 8) | Are pins B0 and D3 directly connected to each other? | Set EEPROM BYTEs 0 through 80 (= 0x4F) to 0xFF |
| 9) | Exit |
When pins B0 and D3 are jumpered and the EEPROM System configuration is displayed, set your terminal to 9,600 BPS, enter "DES" and you should get this output:
> DES EEPROM contents: 0000: FF FF FF FF FF FF FF FF-FF FF FF FF FF FF FF FF ................ 0010: FF FF FF FF FF FF FF FF-FF FF FF FF FF FF FF FF ................ 0020: FF FF FF FF FF FF FF FF-FF FF FF FF FF FF FF FF ................ 0030: FF FF FF FF FF FF FF FF-FF FF FF FF FF FF FF FF ................ 0040: FF FF FF FF FF FF FF FF-FF FF FF FF FF FF FF FF ................ >
This block contains a loadable, valid, System EEPROM configuration:
:02000002E0001C :10004000FFFFFFFFFFFF002FFFFFFFFFFFFFFFFF8F :100030008016FFFFFFFFFFFF6000B0008001FFFFA1 :1000200024280500FFFF2AFFFF1430200030FFFFC7 :10001000C0003FFF40080367FF2574FFFFFFFFFF9D :100000001021009F010084FF0400FFFF283C50FFE7 :00000001FF
If you've not saved an EEPROM configuration recently, but have a "DES"
dump in the terminal window's backscroll buffer, there is other ways to
restore the prior EEPROM configuration. The first way is to enter each
BYTE by hand, using the "0x" prefix to enter hex values. But there is
another way. Here are the steps after the FLASH has been erased:
1) Copy those 5 lines with the first 80 EEPROM BYTEs' value to a text file
2) Change "0000: " to "E 00 = "
3) Change "0010: " to "E 10 = "
4) Change "0020: " to "E 20 = "
5) Change "0030: " to "E 30 = "
6) Change "0040: " to "E 40 = "
7) Move the line now beginning with "E 00 = " to be the last row
8) On that same "E 00 = " line, make note of the value after the '-' (often "04" as in prior output above)
9) On that same "E 00 = " line, change the BYTE after the '-' to "08"
10) On all five (5) lines, remove the "-" between the values for BYTEs 7 and 8
11) On all five (5) lines, remove the ASCII decoding after the 16th BYTE
12) After the last line, enter this new line: "E 8 ^= 8"
13) Type this line into the device at the command prompt: "E 8 = 0x0C"
14) Wait at least one second for it to be recognized.
15) Copy and paste those 6 lines into the device at the command prompt
16) Reboot the device, particularly to implement any change in communication rate.
EEbFlags_OS is the variable
at EEPROM address 8 and its 4th bit (= B00001000 = 8) is named
BIT_OS_HEX_PARSE. Setting
that BIT causes each value entered to not need an "0x" prefix to be
interpreted as a hexadecimal value, but three notes:
* Recall, for example, that "10" is no longer "ten", but is "sixteen".
* Be sure to turn BIT_OS_HEX_PARSE off (e.g., "E 8 ~= 8") as soon as you're done using it.
* This feature can be used elsewhere, just be careful since many values are changed very quickly.
| Notes: | |
| If EEbFlags_Security is not 0xFF but has either BIT_SEC_MUST_BE_0 or BIT_SEC_NO_EISP_CK set on startup, the Check_EISP subroutine is being told not to change the EEPROM configuration. Be VERY CERTAIN and careful when changing this BYTE. Be sure to make note of the BPS rate to be able to reconnect with the device. | |
| It is a great idea to make backups of an EEPROM System configuration and even that for the entire EEPROM. It's easy to do; just capture the output after typing "DEH+". | |
| See also: | |
| The Calculate_UBRR System Function. | |